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IEEEPACT
2005
IEEE
16 years 1 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
IEEEPACT
2005
IEEE
16 years 1 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
16 years 1 months ago
Energy Optimization of Subthreshold-Voltage Sensor Network Processors
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...
Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeve...
ISCC
2005
IEEE
16 years 1 months ago
Trie-Based Policy Representations for Network Firewalls
Network firewalls remain the forefront defense for most computer systems. These critical devices filter traffic by comparing arriving packets to a list of rules, or security po...
Errin W. Fulp, Stephen J. Tarsa
ISCC
2005
IEEE
16 years 1 months ago
Describing Multidimensional Schedules for Media-Access Control in Time-Triggered Communication
A shared communication medium is characterized by multiple entities that use this medium by reading and writing from and to it. Write operations on the shared communication medium...
Sebastian Fischmeister
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