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» Geometry of synthesis: a structured approach to VLSI design
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GLVLSI
2010
IEEE
187views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Write activity reduction on flash main memory via smart victim cache
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
Liang Shi, Chun Jason Xue, Jingtong Hu, Wei-Che Ts...
DATE
2007
IEEE
146views Hardware» more  DATE 2007»
16 years 12 days ago
Data-flow transformations using Taylor expansion diagrams
Abstract: An original technique to transform functional representation of the design into a structural representation in form of a data flow graph (DFG) is described. A canonical,...
Maciej J. Ciesielski, Serkan Askar, Daniel Gomez-P...
SIGLEX
1991
15 years 9 months ago
Logical Structures in the Lexicon
The lexical entry for a word must contain all the information needed to construct a semantic representation for sentences that contain the word. Because of that requirement, the f...
John F. Sowa
ISVLSI
2003
IEEE
138views VLSI» more  ISVLSI 2003»
15 years 11 months ago
Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory
The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly differe...
Sarah E. Frost, Arun Rodrigues, Charles A. Giefer,...

Lecture Notes
443views
17 years 4 months ago
Design and Analysis of Computer Algorithms
"This course will consist of a number of major sections. The first will be a short review of some preliminary material, including asymptotics, summations, and recurrences and ...
David M. Mount