241 search results - page 20 / 49 » Geometry of synthesis: a structured approach to VLSI design |
137
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CHARME
2001
Springer
15 years 10 months ago
2001
Springer
Abstract. We survey the work done so far in the FLaSH project (Functional Languages for Synthesising Hardware) in which the core ideas are (i) using a functional language SAFL to d...
147
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CAD
2005
Springer
15 years 6 months ago
2005
Springer
Heterogeneous structures represent an important new frontier for 21st century engineering. Human tissues, composites, `smart' and multimaterial objects are all physically man...
141
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
149
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ACSD
2005
IEEE
15 years 11 months ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
161
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SAMOS
2005
Springer
15 years 11 months ago
2005
Springer
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...