241 search results - page 15 / 49 » Geometry of synthesis: a structured approach to VLSI design |
214
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
164
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DFT
2005
IEEE
15 years 11 months ago
2005
IEEE
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
128
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ASPDAC
1995
ACM
15 years 9 months ago
1995
ACM
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
184
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DATE
2005
IEEE
15 years 11 months ago
2005
IEEE
Importance of addressing soft errors in both safety critical applications and commercial consumer products is increasing, mainly due to ever shrinking geometries, higher-density c...
142
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ISCAS
2007
IEEE
16 years 10 days ago
2007
IEEE
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...