241 search results - page 14 / 49 » Geometry of synthesis: a structured approach to VLSI design |
146
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CAEPIA
2007
Springer
16 years 7 days ago
2007
Springer
This paper describes an approach to automatically obtain an HTN planning domain from a well structured learning objects repository and also to apply an HTN planner to obtain IMS Le...
152
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VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
149
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ISPD
2005
ACM
15 years 11 months ago
2005
ACM
Research in floorplanning and block-packing has generated a variety of data structures to represent spatial configurations of circuit modules. Much of this work focuses on the g...
144
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ASYNC
2003
IEEE
15 years 11 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
152
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VLSID
2005
IEEE
15 years 11 months ago
2005
IEEE
Microfluidics-based biochips offer a promising platform for massively parallel DNA analysis, automated drug discovery, and real-time biomolecular recognition. The first part of th...