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ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
16 years 3 months ago
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jia...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 3 months ago
Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits
In this work we propose a methodology to self-consistently solve leakage power with temperature to predict thermal runaway. We target 28nm FinFET based circuits as they are more p...
Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz,...
ICCAD
2006
IEEE
122views Hardware» more  ICCAD 2006»
16 years 3 months ago
Network coding for routability improvement in VLSI
With the standard approach for establishing multicast connections over a network, network nodes are utilized to forward and duplicate the packets received over the incoming links....
Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulat...
ICCAD
2003
IEEE
122views Hardware» more  ICCAD 2003»
16 years 3 months ago
Weibull Based Analytical Waveform Model
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...
Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail
SOSP
2009
ACM
16 years 3 months ago
ODR: output-deterministic replay for multicore debugging
Reproducing bugs is hard. Deterministic replay systems address this problem by providing a high-fidelity replica of an original program run that can be repeatedly executed to zer...
Gautam Altekar, Ion Stoica
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