Sciweavers

5387 search results - page 714 / 1078
» Generating generic functions
Sort
View
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
15 years 11 months ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
IEEEPACT
1999
IEEE
15 years 11 months ago
Localizing Non-Affine Array References
Existing techniques can enhance the locality of arrays indexed by affine functions of induction variables. This paper presents a technique to localize non-affine array references,...
Nicholas Mitchell, Larry Carter, Jeanne Ferrante
EPIA
1999
Springer
15 years 11 months ago
Combinatorial Optimization in OPL Studio
OPL is a modeling language for mathematical programming and combinatorial optimization problems. It is the first modeling language to combine high-level algebraic and set notation...
Pascal Van Hentenryck, Laurent Michel, Philippe La...
174
Voted
DATE
1998
IEEE
110views Hardware» more  DATE 1998»
15 years 11 months ago
Scheduling and Module Assignment for Reducing Bist Resources
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...
IPPS
1998
IEEE
15 years 11 months ago
Self-Testing Fault-Tolerant Real-Time Systems
We propose a periodic diagnostic algorithm based on the testing model of computation for real-time systems. The diagnostic task runs on every processor of the system. When the task...
M. Rooholamini, Seyed H. Hosseini