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ITC
1998
IEEE
114views Hardware» more  ITC 1998»
15 years 10 months ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba
FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
15 years 11 months ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
JCT
2010
144views more  JCT 2010»
15 years 5 months ago
Combinatorics of generalized q-Euler numbers
Abstract. New enumerating functions for the Euler numbers are considered. Several of the relevant generating functions appear in connection to entries in Ramanujan’s Lost Noteboo...
Tim Huber, Ae Ja Yee
ICIAP
2009
ACM
16 years 7 months ago
A New Generative Feature Set Based on Entropy Distance for Discriminative Classification
Abstract. Score functions induced by generative models extract fixeddimensions feature vectors from different-length data observations by subsuming the process of data generation, ...
Alessandro Perina, Marco Cristani, Umberto Castell...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
16 years 17 days ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...