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ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
14 years 2 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
INFOCOM
2012
IEEE
13 years 9 months ago
Network optimization for DHT-based applications
—P2P platforms have been criticized because of the heavy strain that some P2P services can inflict on costly interdomain links of network operators. It is therefore necessary to...
Yi Sun, Yang Richard Yang, Xiaobing Zhang, Yang Gu...
227
Voted
CVPR
2009
IEEE
17 years 1 months ago
Vocabulary Hierarchy Optimization for Effective and Transferable Retrieval
Scalable image retrieval systems usually involve hierarchical quantization of local image descriptors, which produces a visual vocabulary for inverted indexing of images. Although ...
Rongrong Ji (Harbin Institute of Technology), Xing...
AOSD
2009
ACM
16 years 1 months ago
Dependent advice: a general approach to optimizing history-based aspects
Many aspects for runtime monitoring are history-based: they contain pieces of advice that execute conditionally, based on the observed execution history. History-based aspects are...
Eric Bodden, Feng Chen, Grigore Rosu
ICS
2001
Tsinghua U.
15 years 11 months ago
Global optimization techniques for automatic parallelization of hybrid applications
This paper presents a novel technique to perform global optimization of communication and preprocessing calls in the presence of array accesses with arbitrary subscripts. Our sche...
Dhruva R. Chakrabarti, Prithviraj Banerjee