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ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
16 years 6 days ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
ISLPED
2004
ACM
157views Hardware» more  ISLPED 2004»
16 years 6 days ago
4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors
We present a novel temperature/leakage sensor, developed for high-speed, low-power, monitoring of processors and complex VLSI chips. The innovative idea is the use of 4T SRAM cell...
Stefanos Kaxiras, Polychronis Xekalakis
ISLPED
2004
ACM
110views Hardware» more  ISLPED 2004»
16 years 6 days ago
Reducing pipeline energy demands with local DVS and dynamic retiming
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniqu...
Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Au...
ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
16 years 6 days ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
197
Voted
ISPD
2004
ACM
189views Hardware» more  ISPD 2004»
16 years 6 days ago
Almost optimum placement legalization by minimum cost flow and dynamic programming
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
Ulrich Brenner, Anna Pauli, Jens Vygen
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