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DAC
2002
ACM
16 years 7 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
DAC
2003
ACM
16 years 7 months ago
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
DAC
2005
ACM
16 years 7 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
DAC
2005
ACM
16 years 7 months ago
Incremental retiming for FPGA physical synthesis
In this paper, we present a new linear-time retiming algorithm that produces near-optimal results. Our implementation is specifically targeted at Altera's Stratix [1] FPGAbas...
Deshanand P. Singh, Valavan Manohararajah, Stephen...
DAC
2005
ACM
16 years 7 months ago
Operator-based model-order reduction of linear periodically time-varying systems
eriodically time-varying (LPTV) abstractions are useful for a variety of communication and computer subsystems. In this paper, we present a novel operator-based model-order reduct...
Yayun Wan, Jaijeet S. Roychowdhury