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DATE
2005
IEEE
132views Hardware» more  DATE 2005»
16 years 8 days ago
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage
In this paper, we investigate the impact of Tox and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a s...
Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylve...
GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
16 years 8 days ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
ICDCS
2005
IEEE
16 years 8 days ago
FraNtiC: A Fractal Geometric Framework for Mesh-Based Wireless Access Networks
The design of the access networks of next generation broadband wireless systems requires special attention in the light of changing network characteristics. In this paper, we pres...
Samik Ghosh, Kalyan Basu, Sajal K. Das
ICMCS
2005
IEEE
158views Multimedia» more  ICMCS 2005»
16 years 7 days ago
Processor Load Analysis for Mobile Multimedia Streaming: The Implication of Power Reduction
The software codec on mobile device introduces significant power consumption because the energy efficiency of general processor based system is much lower than that of the dedicat...
Min Li, Xiaobo Wu, Zihua Guo, Richard Yao, Xiaolan...
ICRA
2005
IEEE
152views Robotics» more  ICRA 2005»
16 years 7 days ago
An Incremental Harmonic Function-based Probabilistic Roadmap Approach to Robot Path Planning
— A new hybrid motion planning technique based on Harmonic Functions (HF) and Probabilistic Roadmaps (PRM) is presented. The proposed approach consists of incrementally building ...
Moslem Kazemi, Mehran Mehrandezh, Kamal K. Gupta