4507 search results - page 313 / 902 » Generalized Binet dynamics |
181
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
178
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
189
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CHI
2009
ACM
16 years 1 months ago
2009
ACM
Visualisations of dynamic data change in appearance over time, reflecting changes in the underlying data, be that the development of a social network, or the addition or removal o...
170
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ISPD
2009
ACM
16 years 1 months ago
2009
ACM
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
186
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ICAC
2009
IEEE
16 years 1 months ago
2009
IEEE
Dynamic adaptation may be used to prevent software downtime while new requirements and responses to environmental conditions are incorporated into the system. Previously, we studi...