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GLVLSI
2005
IEEE
147views VLSI» more  GLVLSI 2005»
16 years 1 days ago
1-V 7-mW dual-band fast-locked frequency synthesizer
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen
ISQED
2005
IEEE
133views Hardware» more  ISQED 2005»
16 years 11 hour ago
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
KBSE
2005
IEEE
16 years 9 hour ago
Identifying traits with formal concept analysis
Traits are basically mixins or interfaces but with method bodies. In languages that support traits, classes are composed out of traits. There are two main advantages with traits. ...
Adrian Lienhard, Stéphane Ducasse, Gabriela...
KBSE
2005
IEEE
16 years 9 hour ago
A threat-driven approach to modeling and verifying secure software
This paper presents a formal approach to threat-driven modeling and verification of secure software using aspect-oriented Petri nets. Based on the behavior model of intended funct...
Dianxiang Xu, Kendall E. Nygard
ACMMSP
2005
ACM
115views Hardware» more  ACMMSP 2005»
15 years 12 months ago
Performance characteristics of MAUI: an intelligent memory system architecture
Combining ideas from several previous proposals, such as Active Pages, DIVA, and ULMT, we present the Memory Arithmetic Unit and Interface (MAUI) architecture. Because the “inte...
Justin Teller, Charles B. Silio Jr., Bruce L. Jaco...