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GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
16 years 20 days ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
IROS
2006
IEEE
143views Robotics» more  IROS 2006»
16 years 19 days ago
A New Method of Executing Multiple Auxiliary Tasks by Redundant Nonholonomic Mobile Manipulators
— This paper addresses the multiple tasks performing issues for redundant nonholonomic mobile manipulators. An extended gradient projection redundancy resolution scheme is propos...
Yugang Liu, Yangmin Li
ACL2
2006
ACM
16 years 18 days ago
Adding parallelism capabilities to ACL2
We have implemented parallelism primitives that permit an ACL2 programmer to parallelize execution of ACL2 functions. We (1) introduce logical definitions for these primitives, (...
David L. Rager
ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
16 years 18 days ago
SAT-based optimal hypergraph partitioning with replication
We propose a methodology for optimal k-way partitioning with replication of directed hypergraphs via Boolean satisfiability. We begin by leveraging the power of existing and emerg...
Michael G. Wrighton, André DeHon
DOCENG
2006
ACM
16 years 18 days ago
The limsee3 multimedia authoring model
For most users, authoring multimedia documents remains a complex task. One solution to deal with this problem is to provide template-based authoring tools but with the drawback of...
Romain Deltour, Cécile Roisin