Sciweavers

1862 search results - page 139 / 373
» General Architecture for Hardware Implementation of Genetic ...
Sort
View
CODES
2003
IEEE
15 years 11 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
EGH
2004
Springer
15 years 11 months ago
A hierarchical shadow volume algorithm
The shadow volume algorithm is a popular technique for real-time shadow generation using graphics hardware. Its major disadvantage is that it is inherently fillrate-limited, as t...
Timo Aila, Tomas Akenine-Möller
RSP
2003
IEEE
149views Control Systems» more  RSP 2003»
15 years 11 months ago
Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...
ISCAS
1994
IEEE
117views Hardware» more  ISCAS 1994»
15 years 10 months ago
Design of a Fast Sequential Decoding Algorithm Based on Dynamic Searching Strategy
This paper presents a new sequential decoding algorithm based on dynamic searching strategy to improve decoding efficiency. The searching strategy is to exploit both sorting and p...
Wen-Wei Yang, Li-Fu Jeng, Chen-Yi Lee
AICCSA
2006
IEEE
130views Hardware» more  AICCSA 2006»
15 years 8 months ago
A Categorization Scheme for Semantic Web Search Engines
Semantic web search engines are evolving and many prototype systems and some implementation have been developed. However, there are some different views on what a semantic search e...
Kyumars Sheykh Esmaili, Hassan Abolhassani