1862 search results - page 134 / 373 » General Architecture for Hardware Implementation of Genetic ... |
180
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DSD
2004
IEEE
15 years 10 months ago
2004
IEEE
In this paper we present an analysis of the minimal hardware precision required to implement Support Vector Machine (SVM) classification within a Logarithmic Number System archite...
168
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IPPS
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
189
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GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
136
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FPL
2000
Springer
15 years 10 months ago
2000
Springer
Many applications can be modeled as subgraph isomorphism problems. However, this problem is generally NP-complete and difficult to compute. A custom computing circuit is a prospect...
179
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ISCA
2005
IEEE
15 years 12 months ago
2005
IEEE
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...