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ITC
1999
IEEE
78views Hardware» more  ITC 1999»
15 years 10 months ago
Minimized power consumption for scan-based BIST
Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture a...
Stefan Gerstendörfer, Hans-Joachim Wunderlich
ASAP
2004
IEEE
115views Hardware» more  ASAP 2004»
15 years 10 months ago
A Low-Power Carry Skip Adder with Fast Saturation
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...
Michael J. Schulte, Kai Chirca, John Glossner, Hao...
AI
2004
Springer
15 years 6 months ago
Logic-based subsumption architecture
We describe a logic-based AI architecture based on Brooks' subsumption architecture. In this architecture, we axiomatize different layers of control in First-Order Logic (FOL...
Eyal Amir, Pedrito Maynard-Zhang
DAC
2005
ACM
16 years 7 months ago
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration
Many reconfigurable architectures offer partial dynamic configurability, but current system-level tools cannot guarantee feasible implementations when exploiting this feature. We ...
Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. D...
GPCE
2007
Springer
16 years 14 days ago
A type-centric framework for specifying heterogeneous, large-scale, component-oriented, architectures
Maintaining integrity, consistency, and enforcing conformance in architectures of large-scale systems requires specification and enforcement of many different forms of structural...
Georg Jung, John Hatcliff