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ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
16 years 3 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...
MASA
2001
Springer
15 years 10 months ago
Intelligent Agents: The Key Concepts
This chapter aims to introduce the reader to the basic issues surrounding the design and implementation of intelligent agents. It begins by motivating the idea of an agent, present...
Michael Wooldridge
FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
15 years 10 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
RSCTC
1998
Springer
175views Fuzzy Logic» more  RSCTC 1998»
15 years 10 months ago
Business Process Understanding: Mining Many Datasets
Abstract. Institutional databases can be instrumental in understanding a business process, but additional data may broaden the empirical perspective on the investigated process. We...
Jan M. Zytkow, Arun P. Sanjeev
CASES
2010
ACM
15 years 4 months ago
Improving the quality of ring oscillator PUFs on FPGAs
Physical Unclonable Functions (PUFs) based on Ring Oscillators (ROs) are a promising primitive for FPGA security. However, the quality of their implementation depends on several d...
Dominik Merli, Frederic Stumpf, Claudia Eckert