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DAC
2010
ACM
15 years 7 months ago
Detecting tangled logic structures in VLSI netlists
This work proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected to each other can...
Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li...
ICAC
2009
IEEE
16 years 28 days ago
Applying adaptation design patterns
Dynamic adaptation may be used to prevent software downtime while new requirements and responses to environmental conditions are incorporated into the system. Previously, we studi...
Andres J. Ramirez, Betty H. C. Cheng
DATE
2008
IEEE
106views Hardware» more  DATE 2008»
16 years 20 days ago
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
Anshuman Chandra, Felix Ng, Rohit Kapur
CODES
2002
IEEE
15 years 11 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
IPPS
2000
IEEE
15 years 10 months ago
Incorporating Non-functional Requirements into Software Architectures
Abstract. The concept of software architecture has created a new scenario for incorporating non-functional and transactional requirements into the software design. Transactional an...
Nelson S. Rosa, George R. Ribeiro-Justo, P. R. F. ...