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FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 7 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...
DAC
2007
ACM
15 years 10 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
CODES
2003
IEEE
15 years 11 months ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
15 years 11 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ERLANG
2003
ACM
15 years 11 months ago
ARMISTICE: an experience developing management software with Erlang
In this paper, some experiences of using the concurrent functional language Erlang to implement a classical vertical application, a risk management information system, are present...
David Cabrero, Carlos Abalde, Carlos Varela, Laura...