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ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
16 years 3 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
15 years 10 months ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin
DAC
2008
ACM
16 years 7 months ago
Enhancing timing-driven FPGA placement for pipelined netlists
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
Kenneth Eguro, Scott Hauck
DAC
2003
ACM
16 years 7 months ago
A new enhanced constructive decomposition and mapping algorithm
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
Alan Mishchenko, Xinning Wang, Timothy Kam
ICWE
2007
Springer
16 years 12 days ago
Model-Driven Development of Web Applications with UWA, MVC and JavaServer Faces
This paper presents a model-driven approach to the development of web applications based on the Ubiquitous Web Application (UWA) design framework, the Model-View-Controller (MVC) a...
Damiano Distante, Paola Pedone, Gustavo Rossi, Ger...