In this work, we parameterize and explore the interconnect structure of pipelined FPGAs. Specifically, we explore the effects of interconnect register population, length of regist...
Akshay Sharma, Katherine Compton, Carl Ebeling, Sc...
Abstract: Interoperability for information systems remains a challenge both at the semantic and organisational levels. The original three-level architecture for local databases nee...
Abstract-- In this paper we present the communication architecture of the DALI Logic Programming Agent-Oriented language and we discuss its semantics. We have designed a meta-level...
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...