Sciweavers

950 search results - page 103 / 190
» Fuzzy logic in architectural design
Sort
View
MSE
2002
IEEE
135views Hardware» more  MSE 2002»
15 years 11 months ago
The Impact of SMT/SMP Designs on Multimedia Software Engineering - A Workload Analysis Study
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
Yen-Kuang Chen, Rainer Lienhart, Eric Debes, Matth...
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 10 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
AHS
2006
IEEE
137views Hardware» more  AHS 2006»
16 years 11 days ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
ICCD
2004
IEEE
138views Hardware» more  ICCD 2004»
16 years 3 months ago
Design and Implementation of Scalable Low-Power Montgomery Multiplier
In this paper, an efficient Montgomery multiplier is introduced for the modular exponentiation operation, which is fundamental to numerous public-key cryptosystems. Four aspects a...
Hee-Kwan Son, Sang-Geun Oh
ICES
2003
Springer
165views Hardware» more  ICES 2003»
15 years 11 months ago
Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms
This paper proposes a coprocessor architecture to speed up hardware evolution. It is designed to be implemented in an FPGA with an integrated microprocessor core. The coprocessor r...
Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Me...