Sciweavers

4987 search results - page 788 / 998
» Fuzzifying P Systems
Sort
View
DFT
1997
IEEE
93views VLSI» more  DFT 1997»
15 years 10 months ago
An IDDQ Sensor for Concurrent Timing Error Detection
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
Christopher G. Knight, Adit D. Singh, Victor P. Ne...
HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
15 years 10 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
HPCA
1996
IEEE
15 years 10 months ago
Register File Design Considerations in Dynamically Scheduled Processors
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
Keith I. Farkas, Norman P. Jouppi, Paul Chow
HPCA
1996
IEEE
15 years 10 months ago
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters
Networks of workstations and high-performance microcomputers have been rarely used for running highperformance applicationslike multimedia, simulations,scientific and engineering ...
Evangelos P. Markatos, Manolis Katevenis
PADS
1996
ACM
15 years 10 months ago
Design of High Level Modelling / High Performance Simulation Environments
Advances in massively parallel platforms are increasing the prospects for high performance discrete event simulation. Still the di culty in parallel programming persists and there...
Bernard P. Zeigler, Doohwan Kim