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DAC
2006
ACM
16 years 7 months ago
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
Wei Zhang, Niraj K. Jha, Li Shang
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
15 years 10 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
IPPS
2010
IEEE
15 years 4 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
ICNP
1998
IEEE
15 years 10 months ago
Improving Wireless LAN Performance via Adaptive Local Error Control
Wireless links can exhibit high error rates due to attenuation, fading, or interfering active radiation sources. To make matters worse, error rates can be highly variable due to c...
David A. Eckhardt, Peter Steenkiste
ICCS
2003
Springer
15 years 11 months ago
Generalization of the Fast Consistency Algorithm to a Grid with Multiple High Demand Zones
Abstract. One of the main challenges of grid systems of large scale and data intensive is that of providing high availability and performance, in spite of the unreliability and del...
Jesús Acosta-Elías, Leandro Navarro-...