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FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
15 years 10 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
HPCA
1998
IEEE
15 years 10 months ago
The Sensitivity of Communication Mechanisms to Bandwidth and Latency
The goal of this paper is to gain insight into the relative performance of communication mechanisms as bisection bandwidth and network latency vary. We compare shared memory with ...
Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren,...
TPDS
2002
105views more  TPDS 2002»
15 years 6 months ago
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
Phil May, Santithorn Bunchua, D. Scott Wills
PERVASIVE
2005
Springer
16 years 1 days ago
Collaborative Sensing in a Retail Store Using Synchronous Distributed Jam Signalling
The retail store environment is a challenging application area for Pervasive Computing technologies. It has demanding base conditions due to the number and complexity of the interd...
Albert Krohn, Tobias Zimmer, Michael Beigl, Christ...
ICCS
2005
Springer
16 years 2 days ago
Games of Inquiry for Collaborative Concept Structuring
Google’s project to digitize five of the world's greatest libraries will dramatically extend their search engine reach in the future. Current search-engine philosophy, which...
Mary A. Keeler, Heather D. Pfeiffer