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RTCSA
1998
IEEE
15 years 10 months ago
Wait-Free Snapshots in Real-Time Systems: Algorithms and Performance
Snap-shot mechanisms are used to read a globally consistent set of variable values. Such a mechanism can be used to solve a variety of communication and synchronization problems, ...
Andreas Ermedahl, Hans Hansson, Marina Papatrianta...
JPDC
2000
141views more  JPDC 2000»
15 years 6 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
16 years 22 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
HICSS
2002
IEEE
143views Biometrics» more  HICSS 2002»
15 years 11 months ago
Business Intelligence in Healthcare Organizations
The management of healthcare organizations starts to recognize the relevance of the definition of care products in relation to management information. In the turmoil between costs...
Ton A. M. Spil, Robert A. Stegwee, Christian J. A....
ISPA
2007
Springer
16 years 21 days ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...