Sciweavers

2291 search results - page 291 / 459
» Future Graphics Architectures
Sort
View
AAAIDEA
2005
IEEE
16 years 4 days ago
SOSIMPLE: A Serverless, Standards-based, P2P SIP Communication System
Voice over IP (VoIP) and Instant Messaging (IM) systems to date have either followed a client-server model or have required the use of clients that do not follow any VoIP or IM st...
David A. Bryan, Bruce Lowekamp, Cullen Jennings
APCSAC
2005
IEEE
16 years 4 days ago
Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures
Increasing microprocessor vulnerability to soft errors induced by neutron and alpha particle strikes prevents aggressive scaling and integration of transistors in future technologi...
Jie Hu, Greg M. Link, Johnsy K. John, Shuai Wang, ...
CODES
2005
IEEE
16 years 4 days ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
SC
2005
ACM
16 years 2 days ago
Cross-Platform Performance Prediction of Parallel Applications Using Partial Execution
Performance prediction across platforms is increasingly important as developers can choose from a wide range of execution platforms. The main challenge remains to perform accurate...
Leo T. Yang, Xiaosong Ma, Frank Mueller
FPL
2005
Springer
112views Hardware» more  FPL 2005»
16 years 1 days ago
Defect-Tolerant FPGA Switch Block and Connection Block with Fine-Grain Redundancy for Yield Enhancement
Future process nodes have such small feature sizes that there will be an increase in the number of manufacturing defects per die. For large FPGAs, it will be critical to tolerate ...
Anthony J. Yu, Guy G. Lemieux