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ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
16 years 3 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
16 years 3 months ago
Exploiting Microarchitectural Redundancy For Defect Tolerance
Continued advancements in fabrication technology and reductions in feature size create challenges in maintaining both manufacturing yield rates and long-term reliability of device...
Premkishore Shivakumar, Stephen W. Keckler, Charle...
ICCAD
2007
IEEE
143views Hardware» more  ICCAD 2007»
16 years 3 months ago
TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction
—As the 193nm lithography is likely to be used for 45nm and even 32nm processes, much more stringent requirement will be posed on Optical Proximity Correction (OPC) technologies....
Peng Yu, David Z. Pan
ICCAD
2005
IEEE
100views Hardware» more  ICCAD 2005»
16 years 3 months ago
Performance-centering optimization for system-level analog design exploration
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-Shih C...
ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
16 years 3 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
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