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MST
2006
97views more  MST 2006»
15 years 6 months ago
Optimal Implicit Dictionaries over Unbounded Universes
An array of n distinct keys can be sorted for logarithmic searching or can be organized as a heap for logarithmic updating, but it is unclear how to attain logarithmic time for bo...
Gianni Franceschini, Roberto Grossi
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
15 years 5 months ago
Combining optimizations in automated low power design
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
Qiang Liu, Tim Todman, Wayne Luk
ISMVL
2002
IEEE
82views Hardware» more  ISMVL 2002»
15 years 11 months ago
Representations of Logic Functions Using QRMDDs
This paper considers quasi-reduced multi-valued decision diagrams with bits (QRMDD( )s) to represent twovalued logic functions. It shows relations between the numbers of nodes in ...
Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, ...
RSA
2010
118views more  RSA 2010»
15 years 5 months ago
Weight of a link in a shortest path tree and the Dedekind Eta function
The weight of a randomly chosen link in the shortest path tree on the complete graph with exponential i.i.d. link weights is studied. The corresponding exact probability generatin...
Piet Van Mieghem
ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
16 years 3 months ago
Interconnect-centric Array Architectures for Minimum SRAM Access Time
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
Azeez J. Bhavnagarwala, Stephen V. Kosonocky, Jame...