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DATE
2004
IEEE
97views Hardware» more  DATE 2004»
15 years 10 months ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
ESTIMEDIA
2006
Springer
15 years 10 months ago
Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip
Increasingly more MPSoC platforms are being developed to meet the rising demands from concurrently executing applications. These systems are often heterogeneous with the use of de...
Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Co...
FPL
2006
Springer
105views Hardware» more  FPL 2006»
15 years 10 months ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
GECCO
2006
Springer
168views Optimization» more  GECCO 2006»
15 years 10 months ago
An artificial immune system and its integration into an organic middleware for self-protection
Our human body is well protected by antibodies from our biological immune system. This protection system matured over millions of years and has proven its functionality. In our re...
Andreas Pietzowski, Wolfgang Trumler, Theo Ungerer
CLUSTER
2001
IEEE
15 years 10 months ago
SOVIA: A User-level Sockets Layer Over Virtual Interface Architecture
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
Jin-Soo Kim, Kangho Kim, Sung-In Jung
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