4890 search results - page 554 / 978 » From system specifications to component behavioral models |
192
Voted
ICCAD
1994
IEEE
15 years 11 months ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
160
Voted
TWEB
2008
15 years 7 months ago
2008
tions at runtime. We introduce the abstract service and adapter components which allow us to separate the compensation logic from the coordination logic. In this way, we can easily...
232
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DAC
2006
ACM
16 years 8 months ago
2006
ACM
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
224
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CHI
2011
ACM
14 years 11 months ago
2011
ACM
Pulitzer Prize-winning journalist Nicholas Kristof argues that “in this century the paramount moral challenge will be the struggle for gender equality around the world.” In th...
236
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CODES
2007
IEEE
15 years 11 months ago
2007
IEEE
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...