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2008
15 years 9 months ago
TaP: Table-based Prefetching for Storage Caches
TaP is a storage cache sequential prefetching and caching technique to improve the read-ahead cache hit rate and system response time. A unique feature of TaP is the use of a tabl...
Mingju Li, Elizabeth Varki, Swapnil Bhatia, Arif M...
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
CF
2008
ACM
15 years 9 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
CHES
2008
Springer
132views Cryptology» more  CHES 2008»
15 years 9 months ago
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
Philipp Grabher, Johann Großschädl, Dan...
CF
2007
ACM
15 years 9 months ago
Computational and storage power optimizations for the O-GEHL branch predictor
In recent years, highly accurate branch predictors have been proposed primarily for high performance processors. Unfortunately such predictors are extremely energy consuming and i...
Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian