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ISCA
2008
IEEE
112views Hardware» more  ISCA 2008»
16 years 29 days ago
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
Onur Mutlu, Thomas Moscibroda
MICRO
2007
IEEE
139views Hardware» more  MICRO 2007»
16 years 25 days ago
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP) system. Memory requests from different threads can interfere with each other. Existing memory acc...
Onur Mutlu, Thomas Moscibroda
MHCI
2007
Springer
16 years 20 days ago
Multi-context photo browsing on mobile devices based on tilt dynamics
This paper presents a photo browsing system on mobile devices to browse and search photos efficiently by tilting action. It employs tilt dynamics and multi-scale photo screen layo...
Sung-Jung Cho, Roderick Murray-Smith, Yeun-Bae Kim
ISMAR
2006
IEEE
16 years 17 days ago
Online camera pose estimation in partially known and dynamic scenes
One of the key requirements of augmented reality systems is a robust real-time camera pose estimation. In this paper we present a robust approach, which does neither depend on ofï...
Gabriele Bleser, Harald Wuest, Didier Stricker
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
16 years 16 days ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
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