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IMS
2000
123views Hardware» more  IMS 2000»
15 years 10 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...
MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 10 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 10 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
SIGCOMM
1991
ACM
15 years 10 months ago
A Control-Theoretic Approach to Flow Control
This paper presents a control-theoretic approach to reactive flow control in networks that do not reserve bandwidth. We assume a round-robin-like queue service discipline in the o...
Srinivasan Keshav
FOSSACS
2010
Springer
15 years 10 months ago
Linearly-Used Continuations in the Enriched Effect Calculus
Abstract. The enriched effect calculus is an extension of Moggi's computational metalanguage with a selection of primitives from linear logic. In this paper, we present an ext...
Jeff Egger, Rasmus Ejlers Møgelberg, Alex S...
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