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192
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MICRO
2006
IEEE
16 years 24 days ago
2006
IEEE
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...
216
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RSP
2006
IEEE
16 years 24 days ago
2006
IEEE
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
192
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IMC
2006
ACM
16 years 23 days ago
2006
ACM
A key step in the semantic analysis of network traffic is to parse the traffic stream according to the high-level protocols it contains. This process transforms raw bytes into s...
204
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CLUSTER
2005
IEEE
16 years 12 days ago
2005
IEEE
Thread migration moves a single call-stack to another machine to improve either load balancing or locality. Current approaches for checkpointing and thread migration are either no...
195
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DATE
2005
IEEE
16 years 12 days ago
2005
IEEE
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...