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ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
15 years 11 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
VL
1996
IEEE
15 years 11 months ago
Steering programs via time travel
Despite years of research into human computer interaction (HCI), the environments programmers must use for problem-solving today--with separate modes and tools for writing, compil...
John W. Atwood Jr., Margaret M. Burnett, Rebecca A...
ICS
1997
Tsinghua U.
15 years 11 months ago
Sparse Code Generation for Imperfectly Nested Loops with Dependences
Standard restructuring compiler tools are based on polyhedral algebra and cannot be used to analyze or restructure sparse matrix codes. We have recently shown that tools based on ...
Vladimir Kotlyar, Keshav Pingali
DAC
1996
ACM
15 years 11 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
CODES
1994
IEEE
15 years 11 months ago
Towards a declarative framework for hardware-software codesign
We present an experimental framework for mapping declarative programs, written in a language known as Ruby, into various combinations of hardware and software. Strategies for para...
Wayne Luk, Teddy Wu