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DATE
2006
IEEE
133views Hardware» more  DATE 2006»
16 years 23 days ago
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, ...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
16 years 23 days ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
ICPPW
2006
IEEE
16 years 22 days ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills
SAINT
2006
IEEE
16 years 21 days ago
A Pervasive Internet Approach to Fine-Grain Power-Aware Computing
We present a novel approach to conserve power in networked mobile devices. Our approach exploits communication within a pervasive smart space as an opportunity to save power as op...
Ahmed Abukmail, Abdelsalam Helal
ML
2006
ACM
16 years 19 days ago
Seminal: searching for ML type-error messages
We present a new way to generate type-error messages in a polymorphic, implicitly, and strongly typed language (specifically Caml). Our method separates error-message generation ...
Benjamin S. Lerner, Dan Grossman, Craig Chambers