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OSDI
2008
ACM
16 years 7 months ago
Binary Translation Using Peephole Superoptimizers
We present a new scheme for performing binary translation that produces code comparable to or better than existing binary translators with much less engineering effort. Instead of...
Sorav Bansal, Alex Aiken
ICCD
2000
IEEE
93views Hardware» more  ICCD 2000»
16 years 3 months ago
Cheap Out-of-Order Execution Using Delayed Issue
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
J. P. Grossman
SAC
2010
ACM
16 years 1 months ago
A real-time architecture design language for multi-rate embedded control systems
This paper presents a language dedicated to the description of the software architecture of complex embedded control systems. The language relies on the synchronous approach but e...
Julien Forget, Frédéric Boniol, Davi...
CGO
2009
IEEE
16 years 1 months ago
Reducing Memory Ordering Overheads in Software Transactional Memory
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...
SC
2009
ACM
16 years 1 months ago
Automating the generation of composed linear algebra kernels
Memory bandwidth limits the performance of important kernels in many scientific applications. Such applications often use sequences of Basic Linear Algebra Subprograms (BLAS), an...
Geoffrey Belter, Elizabeth R. Jessup, Ian Karlin, ...