We present a new scheme for performing binary translation that produces code comparable to or better than existing binary translators with much less engineering effort. Instead of...
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
This paper presents a language dedicated to the description of the software architecture of complex embedded control systems. The language relies on the synchronous approach but e...
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...
Memory bandwidth limits the performance of important kernels in many scientific applications. Such applications often use sequences of Basic Linear Algebra Subprograms (BLAS), an...
Geoffrey Belter, Elizabeth R. Jessup, Ian Karlin, ...