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IPPS
2003
IEEE
16 years 3 days ago
Multiple Instruction Stream Control for an Associative Model of Parallel Computation
This paper describes a system software design for multiple instruction stream control in a massively parallel associative computing environment. The purpose of providing multiple ...
Michael Scherger, Johnnie W. Baker, Jerry L. Potte...
IPPS
1994
IEEE
15 years 11 months ago
Shared Virtual Memory and Generalized Speedup
Generalized speedup is de ned as parallel speed over sequential speed. In this paper the generalized speedup and its relation with other existing performance metrics, such as trad...
Xian-He Sun, Jianping Zhu
IPPS
2010
IEEE
15 years 4 months ago
Exploring parallelism in short sequence mapping using Burrows-Wheeler Transform
Next-generation high throughput sequencing instruments are capable of generating hundreds of millions of reads in a single run. Mapping those reads to a reference genome is an ext...
Doruk Bozdag, Ayat Hatem, Ümit V. Çata...
IPPS
1998
IEEE
15 years 11 months ago
A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh...
Pierpaolo Baglietto, Massimo Maresca, Mauro Miglia...
IEEEPACT
2000
IEEE
15 years 11 months ago
Neighborhood Prefetching on Multiprocessors Using Instruction History
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
David M. Koppelman