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CASES
2004
ACM
16 years 1 days ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
OOPSLA
2004
Springer
15 years 12 months ago
Transparent proxies for java futures
A proxy object is a surrogate or placeholder that controls access to another target object. Proxies can be used to support distributed programming, lazy or parallel evaluation, ac...
Polyvios Pratikakis, Jaime Spacco, Michael W. Hick...
CGO
2009
IEEE
15 years 10 months ago
Communication-Sensitive Static Dataflow for Parallel Message Passing Applications
Message passing is a very popular style of parallel programming, used in a wide variety of applications and supported by many APIs, such as BSD sockets, MPI and PVM. Its importance...
Greg Bronevetsky
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
16 years 3 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
HICSS
2003
IEEE
137views Biometrics» more  HICSS 2003»
15 years 12 months ago
Adjusting Safety Stock Requirements with an AHP-Based Risk Analysis
In most cases safety stock is determined based on the variability of the demand and lead time. The focus has been on the statistics and past performance, and the existing framewor...
Jukka Korpela, Antti Lehmusvaara, Kalevi Kylä...