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ARITH
2005
IEEE
16 years 9 days ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
ASWEC
2005
IEEE
16 years 9 days ago
A Comparison of Reverse Engineering Tools Based on Design Pattern Decomposition
The usefulness of design patterns in forward engineering is already well-known and several tools provide support for their application in the development of software systems. Whil...
Francesca Arcelli Fontana, Stefano Masiero, Claudi...
CCGRID
2005
IEEE
16 years 9 days ago
n-Cycle: a set of algorithms for task distribution on a commodity grid
— The global internet is rich in commodity resources but scarce in specialized resources. We argue that a grid framework can achieve better performance if it separates management...
Ladislau Bölöni, Damla Turgut, Dan C. Ma...
CODES
2005
IEEE
16 years 8 days ago
FlexPath NP: a network processor concept with application-driven flexible processing paths
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...
Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild
COLCOM
2005
IEEE
16 years 8 days ago
On-demand overlay networking of collaborative applications
We propose a new overlay network, called Generic Identifier Network (GIN), for collaborative nodes to share objects with transactions across affiliated organizations by merging th...
Cheng-Jia Lai, Richard R. Muntz