We present an integrated secure group access control tool to support workgroups on the World-Wide Web. The system enables user authentication, encrypted communication and fine-gra...
Abstract -- This paper describes the use of a hierarchical design representation standard, CHDStd, as part of the architecture of the Chip Hierarchical Design System (CHDS). Detail...
S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, ...
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Approximate reachability techniques trade o accuracy with the capacity to deal with bigger designs. Cho et al 3 proposed approximate FSM traversal algorithms over a partition of t...
Shankar G. Govindaraju, David L. Dill, Alan J. Hu,...
This paper presents a sparse state saving scheme for Time Warp parallel discrete event simulation. The scheme bases the selection of the states to be recorded on the event history...