9110 search results - page 366 / 1822 » Formally-Based Design Evaluation |
144
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ISCA
1997
IEEE
15 years 11 months ago
1997
IEEE
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
158
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EATIS
2007
ACM
15 years 10 months ago
2007
ACM
MDIRS is methodology to define the actors and the steps to build efficiently information retrieval (IR) System. MDRIS main mission is to analyze, develop and evaluate mechanisms s...
191
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DFT
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper proposes a test architecture aimed at reducing test time of distributed small embedded SRAMs (eSRAMs). This architecture improves the one proposed in [4, 5]. The improv...
182
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CDES
2006
15 years 8 months ago
2006
A neural network approach is presented for modeling and characterization of on-chip copper spiral inductors. The approach involves the creation of neural network models to map 3D ...
180
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PDPTA
2000
15 years 8 months ago
2000
In this paper, a Shopping Information Agent System (SIAS) is built based on mobile agent technology. It sends out agents to di erent hosts in an electronic marketplace. The agents ...