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IJCNN
2000
IEEE
15 years 11 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
IPPS
2000
IEEE
15 years 11 months ago
A Parallel Co-evolutionary Metaheuristic
In order to show that the parallel co-evolution of di erent heuristic methods may lead to an e cient search strategy, we have hybridized three heuristic agents of complementary beh...
Vincent Bachelet, El-Ghazali Talbi
ISCA
2000
IEEE
90views Hardware» more  ISCA 2000»
15 years 11 months ago
A scalable approach to thread-level speculation
While architects understandhow to build cost-effective parallel machines across a wide spectrum of machine sizes (ranging from within a single chip to large-scale servers), the re...
J. Gregory Steffan, Christopher B. Colohan, Antoni...
ISORC
2000
IEEE
15 years 11 months ago
Scheduling Solutions for Supporting Dependable Real-Time Applications
This paper deals with tolerance to timing faults in time-constrained systems. TAFT (Time Aware Fault-Tolerant) is a recently devised approach which applies tolerance to timing vio...
F. Sandrini, Felicita Di Giandomenico, Andrea Bond...
VR
2000
IEEE
103views Virtual Reality» more  VR 2000»
15 years 11 months ago
A Method of Constructing a Telexistence Visual System Using Fixed Screens
Projection-based visual display systems are expected to be effective platforms for VR applications, in which the displayed images are generated by computer graphics using three-di...
Yasuyuki Yanagida, Taro Maeda, Susumu Tachi
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