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SPAA
2009
ACM
16 years 7 months ago
Inherent limitations on disjoint-access parallel implementations of transactional memory
Transactional memory (TM) is a promising approach for designing concurrent data structures, and it is essential to develop better understanding of the formal properties that can b...
Hagit Attiya, Eshcar Hillel, Alessia Milani
CAV
2009
Springer
212views Hardware» more  CAV 2009»
16 years 7 months ago
Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic
We present the key ideas in the design and implementation of Beaver, an SMT solver for quantifier-free finite-precision bit-vector logic (QF BV). Beaver uses an eager approach, enc...
Susmit Jha, Rhishikesh Limaye, Sanjit A. Seshia
CHI
2008
ACM
16 years 7 months ago
K-sketch: a 'kinetic' sketch pad for novice animators
Because most animation tools are complex and timeconsuming to learn and use, most animations today are created by experts. To help novices create a wide range of animations quickl...
Richard C. Davis, Brien Colwell, James A. Landay
CHI
2006
ACM
16 years 7 months ago
Generating automated predictions of behavior strategically adapted to specific performance objectives
It has been well established in Cognitive Psychology that humans are able to strategically adapt performance, even highly skilled performance, to meet explicit task goals such as ...
Katherine Eng, Richard L. Lewis, Irene Tollinger, ...
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
16 years 7 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...