2813 search results - page 355 / 563 » Formalizing Architectural Connection |
178
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DAC
2012
ACM
13 years 9 months ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
194
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ICCV
2001
IEEE
16 years 8 months ago
2001
IEEE
Robust, real-time tracking of objects from visual data requires probabilistic fusion of multiple visual cues. Previous approaches have either been ad hoc or relied on a Bayesian n...
152
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
Efficient techniques for the manipulation of Binary Decision Diagrams (BDDs) are key to the success of formal verification tools. Recent advances in reachability analysis and mode...
138
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
171
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
Communication-based design represents a formal approach to systemon-a-chip design that considers communication between components as important as the computations they perform. Ou...