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DAC
2002
ACM
16 years 7 months ago
Transformation based communication and clock domain refinement for system design
The ForSyDe methodology has been developed for system level design. In this paper we present formal transformation methods for the refinement of an abstract and formal system mode...
Ingo Sander, Axel Jantsch
DAC
2004
ACM
16 years 7 months ago
The best of both worlds: the efficient asynchronous implementation of synchronous specifications
The desynchronization approach combines a traditional synchronous specification style with a robust asynchronous implementation model. The main contribution of this paper is the d...
Abhijit Davare, Kelvin Lwin, Alex Kondratyev, Albe...
VLSID
2004
IEEE
91views VLSI» more  VLSID 2004»
16 years 7 months ago
Program Slicing for ATPG-Based Property Checking
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
Vivekananda M. Vedula, Whitney J. Townsend, Jacob ...
ACSD
2006
IEEE
129views Hardware» more  ACSD 2006»
16 years 19 days ago
Communicating with Synchronized Environments
In the modern design environments, different modules, available in existent libraries, may obey different architectural styles and execution models. Reaching a well– behaved com...
Tiberiu Seceleanu, Axel Jantsch
P2P
2006
IEEE
16 years 17 days ago
Cost-Based Analysis of Hierarchical DHT Design
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
Stefan Zöls, Zoran Despotovic, Wolfgang Kelle...