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FORMATS
2006
Springer
15 years 10 months ago
2006
Springer
Networks of communicating finite-state machines equipped with local clocks generate timed MSCs. We consider the problem of checking whether these timed MSCs are "consistent&qu...
172
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FMCAD
2000
Springer
15 years 10 months ago
2000
Springer
BLIF is a hardware description language designed for the hierarchical description of sequential circuits. We give a denotational semantics for BLIF-MV, a popular dialect of BLIF, t...
172
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ICDCSW
2000
IEEE
15 years 10 months ago
2000
IEEE
Model-checking has turned out to be an efficient and relatively easy-to-use technique in the verification of formally described programs. However, there is one major drawback in u...
166
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IFM
2000
Springer
15 years 10 months ago
2000
Springer
This paper presents a means of structuring specifications in real-time Object-Z: an integration of Object-Z with the timed refinement calculus. Incremental modification of classes ...
158
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SAS
2000
Springer
15 years 10 months ago
2000
Springer
d Abstract) James Riely1 and Jan Prins2 1 DePaul University 2 University of North Carolina at Chapel Hill Abstract. Flattening is a program transformation that eliminates nested pa...